Computer Architecture with an Industrial RISC-V Core [RVfpga] (LFD119x)

The course provides hands-on experience with RISC-V computer architecture and teaches how to develop and compile C and RISC-V assembly code for the RVFpga SoC as well as how to use and extend the input/output system of the RVfpga SoC. Additionally, you will learn how to configure the microarchitecture of the VeeR EH1 CoreTM and test its different features using performance counters and industry-standard benchmarks. Finally, the course provides step-by-step instructions on how to execute programs on the Nexys A7 board and simulate programs using: Whisper instruction set simulator (ISS); Verilator-based RVfpga-ViDBo; RVfpga-Pipeline; and RVfpga-Trace.

This course is for junior level or higher university computer science, electrical and computer engineers and other technical students as well as others who would like to learn and experiment with RISC-V.